The Latest Technologies and SoC/Package/PCB Co-Design

The Latest Technologies and SoC/Package/PCB Co-Design
Design Force's 3D graphic technology and multi-object hierarchical design compatible editing function are perfect for the design of complex 3D structures such as embedded PCBs and composite devices. It also makes possible optimal design and dynamic editing on the same canvas of chips, packages and boards, which up until now have had to be designed separately.

[Embedded PCBs]
Through its 3D display, Design Force simplifies editing tasks such as moving active devices and their peripheral components together from the surface layer to an inner layer, and allows more efficient embedded PCB floor planning.

[LSI/package co-design]
In addition to LEF and DEF formats, Design Force now supports Si2's Open Access database. This provides increased compatibility with semiconductor design tools. A function which simultaneously optimizes I/O operations between semiconductors and packages has also been added.

<Customer Case Study>
link_icon.gif "A co-design solution for a wireless RF flip-chip design dilemma" (TOSHIBA CORPORATION)
Published: 22 March 2018 by Tom Whipple, Printed Circuit Design & Fab

[Package design]
Package design operations have been made more efficient through 3D display and special functions which handle design data specific to package design data such as bond wire, pads and dies.

[3D mounted large scale composite device design]
Design Force supports advanced mounting technologies for composite devices using interposers, mounting design for semi-conductors using TSV, and large scale composite devices combining these with SiPs.

MID (Molded Interconnect Device), an increasingly popular technology for product miniaturization, is planned to be supported in a future release of Design Force.